patch-2.4.22 linux-2.4.22/arch/mips/ddb5xxx/ddb5476/pci_ops.c

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diff -urN linux-2.4.21/arch/mips/ddb5xxx/ddb5476/pci_ops.c linux-2.4.22/arch/mips/ddb5xxx/ddb5476/pci_ops.c
@@ -49,8 +49,6 @@
 	DDB_PCI_CONFIG_SIZE
 };
 
-static int pci_config_workaround=1;
-
 /*
  * access config space
  */
@@ -63,27 +61,11 @@
         u32 virt_addr = swap->config_base;
 	u32 option;
 
-	if (pci_config_workaround) {
-		/* [jsun] work around Vrc5476 controller itself, returnning
-		 * slot 0 essentially makes vrc5476 invisible
-		 */
-		if (slot_num == 12) slot_num = 0;
-
-#if 0
-		/* BUG : skip P2P bridge for now */
-		if (slot_num == 5) slot_num = 0;
-#endif
-
-	} else {
-		/* now we have to be hornest, returning the true
-		 * PCI config headers for vrc5476
-		 */
-		if (slot_num == 12) {
-			swap->pdar_backup = ddb_in32(swap->pdar);
-			swap->pmr_backup = ddb_in32(swap->pmr);
-			return DDB_BASE + DDB_PCI_BASE;
-		}
-	}
+	/*
+	 * BUG: skip host PCI controller.  Its BARS are bogus.
+	 */
+	if (slot_num == 12)
+		slot_num = 0;
 
 	/* minimum pdar (window) size is 2MB */
 	db_assert(swap->config_size >= (2 << 20));
@@ -294,64 +276,3 @@
 	extpci_write_config_word,
 	extpci_write_config_dword
 };
-
-
-#if defined(CONFIG_DEBUG)
-void jsun_scan_pci_bus(void)
-{
-	struct pci_bus bus;
-	struct pci_dev dev;
-	unsigned int devfn;
-	int j;
-
-	pci_config_workaround = 0;
-
-	bus.parent = NULL;	/* we scan the top level only */
-	dev.bus = &bus;
-	dev.sysdata = NULL;
-
-	/* scan ext pci bus and io pci bus*/
-	for (j=0; j< 1; j++) {
-		printk(KERN_INFO "scan ddb5476 external PCI bus:\n");
-		bus.ops = &ddb5476_ext_pci_ops;
-
-		for (devfn = 0; devfn < 0x100; devfn += 8) {
-			u32 temp;
-			u16 temp16;
-			u8 temp8;
-			int i;
-
-			dev.devfn = devfn;
-			db_verify(pci_read_config_dword(&dev, 0, &temp),
-				    == PCIBIOS_SUCCESSFUL);
-			if (temp == 0xffffffff) continue;
-
-			printk(KERN_INFO "slot %d: (addr %d) \n", devfn/8,
-			       11+devfn/8);
-
-			/* verify read word and byte */
-			db_verify(pci_read_config_word(&dev, 2, &temp16),
-				  == PCIBIOS_SUCCESSFUL);
-			db_assert(temp16 == (temp >> 16));
-			db_verify(pci_read_config_byte(&dev, 3, &temp8),
-				  == PCIBIOS_SUCCESSFUL);
-			db_assert(temp8 == (temp >> 24));
-			db_verify(pci_read_config_byte(&dev, 1, &temp8),
-				  == PCIBIOS_SUCCESSFUL);
-			db_assert(temp8 == ((temp >> 8) & 0xff));
-
-			for (i=0; i < 16; i++) {
-				if ((i%4) == 0)
-					printk(KERN_INFO);
-				db_verify(pci_read_config_dword(&dev, i*4, &temp),
-					  == PCIBIOS_SUCCESSFUL);
-				printk("\t%08X", temp);
-				if ((i%4) == 3)
-					printk("\n");
-			}
-		}
-	}
-
-	pci_config_workaround = 1;
-}
-#endif

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