patch-2.4.22 linux-2.4.22/arch/mips/ddb5xxx/ddb5074/pci.c

• Lines: 147
• Date: 2003-08-25 04:44:39.000000000 -0700
• Orig file: linux-2.4.21/arch/mips/ddb5xxx/ddb5074/pci.c
• Orig date: 2002-11-28 15:53:09.000000000 -0800

diff -urN linux-2.4.21/arch/mips/ddb5xxx/ddb5074/pci.c linux-2.4.22/arch/mips/ddb5xxx/ddb5074/pci.c
@@ -9,22 +9,24 @@
 #include <asm/ddb5xxx/ddb5xxx.h>
 
 static struct resource extpci_io_resource = {
-    "pci IO space",
-    0x1000,             /* leave some room for ISA bus */
-    DDB_PCI_IO_SIZE -1,
-    IORESOURCE_IO};
+	"pci IO space",
+	0x1000,			/* leave some room for ISA bus */
+	DDB_PCI_IO_SIZE - 1,
+	IORESOURCE_IO
+};
 
 static struct resource extpci_mem_resource = {
-    "pci memory space",
-    DDB_PCI_MEM_BASE + 0x00100000,  /* leave 1 MB for RTC */
-    DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE -1,
-    IORESOURCE_MEM};
+	"pci memory space",
+	DDB_PCI_MEM_BASE + 0x00100000,	/* leave 1 MB for RTC */
+	DDB_PCI_MEM_BASE + DDB_PCI_MEM_SIZE - 1,
+	IORESOURCE_MEM
+};
 
 extern struct pci_ops ddb5476_ext_pci_ops;
 
 struct pci_channel mips_pci_channels[] = {
-    { &ddb5476_ext_pci_ops, &extpci_io_resource, &extpci_mem_resource },
-    { NULL, NULL, NULL}
+	{&ddb5476_ext_pci_ops, &extpci_io_resource, &extpci_mem_resource},
+	{NULL, NULL, NULL}
 };
 
 #define     PCI_EXT_INTA        8
@@ -52,7 +54,8 @@
 	/* SLOT:  13 */ nile4_to_irq(PCI_EXT_INTE),
 };
 
-void __init pcibios_fixup_irqs(void) {
+void __init pcibios_fixup_irqs(void)
+{
 
 	struct pci_dev *dev;
 	int slot_num;
@@ -60,12 +63,12 @@
 	pci_for_each_dev(dev) {
 		slot_num = PCI_SLOT(dev->devfn);
 		db_assert(slot_num < MAX_SLOT_NUM);
-printk("irq_map[%d]: %02x\n",slot_num, irq_map[slot_num]);
+		printk("irq_map[%d]: %02x\n", slot_num, irq_map[slot_num]);
 		db_assert(irq_map[slot_num] != 0xff);
 
 		pci_write_config_byte(dev,
-							PCI_INTERRUPT_LINE,
-							irq_map[slot_num]);
+				      PCI_INTERRUPT_LINE,
+				      irq_map[slot_num]);
 
 		dev->irq = irq_map[slot_num];
 	}
@@ -73,27 +76,27 @@
 
 void __init ddb_pci_reset_bus(void)
 {
-    u32 temp;
+	u32 temp;
 
-    /*
-     * I am not sure about the "official" procedure, the following
-     * steps work as far as I know:
-     * We first set PCI cold reset bit (bit 31) in PCICTRL-H.
-     * Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
-     * The same is true for both PCI channels.
-     */
-    temp = ddb_in32(DDB_PCICTRL+4);
-    temp |= 0x80000000;
-    ddb_out32(DDB_PCICTRL+4, temp);
-    temp &= ~0xc0000000;
-    ddb_out32(DDB_PCICTRL+4, temp);
+	/*
+	 * I am not sure about the "official" procedure, the following
+	 * steps work as far as I know:
+	 * We first set PCI cold reset bit (bit 31) in PCICTRL-H.
+	 * Then we clear the PCI warm reset bit (bit 30) to 0 in PCICTRL-H.
+	 * The same is true for both PCI channels.
+	 */
+	temp = ddb_in32(DDB_PCICTRL + 4);
+	temp |= 0x80000000;
+	ddb_out32(DDB_PCICTRL + 4, temp);
+	temp &= ~0xc0000000;
+	ddb_out32(DDB_PCICTRL + 4, temp);
 
 }
 
 unsigned __init int pcibios_assign_all_busses(void)
 {
-    /* we hope pci_auto has assigned the bus numbers to all buses */
-    return 1;
+	/* we hope pci_auto has assigned the bus numbers to all buses */
+	return 1;
 }
 
 void __init pcibios_fixup_resources(struct pci_dev *dev)
@@ -106,25 +109,24 @@
 
 	pci_for_each_dev(dev) {
 		if (dev->vendor == PCI_VENDOR_ID_AL &&
-			dev->device == PCI_DEVICE_ID_AL_M7101) {
-				/*
-				 * It's nice to have the LEDs on the GPIO pins
-				 * available for debugging
-				 */
-				extern struct pci_dev *pci_pmu;
-				u8 t8;
-
-				pci_pmu = dev;  /* for LEDs D2 and D3 */
-				/* Program the lines for LEDs D2 and D3 to output */
-				pci_read_config_byte(dev, 0x7d, &t8);
-				t8 |= 0xc0;
-				pci_write_config_byte(dev, 0x7d, t8);
-				/* Turn LEDs D2 and D3 off */
-				pci_read_config_byte(dev, 0x7e, &t8);
-				t8 |= 0xc0;
-				pci_write_config_byte(dev, 0x7e, t8);
+		    dev->device == PCI_DEVICE_ID_AL_M7101) {
+			/*
+			 * It's nice to have the LEDs on the GPIO pins
+			 * available for debugging
+			 */
+			extern struct pci_dev *pci_pmu;
+			u8 t8;
+
+			pci_pmu = dev;	/* for LEDs D2 and D3 */
+			/* Program the lines for LEDs D2 and D3 to output */
+			pci_read_config_byte(dev, 0x7d, &t8);
+			t8 |= 0xc0;
+			pci_write_config_byte(dev, 0x7d, t8);
+			/* Turn LEDs D2 and D3 off */
+			pci_read_config_byte(dev, 0x7e, &t8);
+			t8 |= 0xc0;
+			pci_write_config_byte(dev, 0x7e, t8);
 
 		}
 	}
 }
-