
Tutorial Directory
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In this directory, you will find 3 tutorials :

1. ADDACU in the subdirectory addacu. 

It is a small batch that will introduce you to alliance.
Try the batch addacu that goes from the VHDL behavioural description
of an adder with accumulator, to the cif file for the layout of masks.
The resulting chip contains less than 500 transistors.
Time required to run this batch is 30 minutes.

2. AMD2901 in the subdirectory amd2901.

This tutorial includes two identical text files (latex file: tutorial.tex, 
and postcipt file: tutorial.ps) and all necessary source files.
Follow the commands desribed in the tutorial to generate the cif layout 
masks of the amd2901 microprocessor, from its VHDL behavioural description.
The resulting chip contains less than 3000 transistors.
Time required to do this tutorial in batch mode is about 1 hour.
This tutorial will help you to get started with ALLIANCE tools and the
standard cells design flow. 
This tutorial does not use the logic synthesis tools.
Besides the interactive mode, a Makefile builds automatically the chip.
Running the Makefile will tell you if the ALLIANCE CAD tools are
correctly installed on your machine.

3. DLXM in the subdirectory dlxm.

This tutorial includes two identical text files (latex file: tutorial.tex, 
and postcipt file: tutorial.ps) and all necessary source files.
Follow the commands described in the tutorial to design the 32 bit DLX 
microprogrammed microprocessor, from its VHDL behavioural specification to 
the the cif layout.
The resulting chip contains about 30 000 transistors.
Time required to do this tutorial in batch mode is about 6 hours.
It can be easilly cut into 4 main steps, as described in the tutorial.
This tutorial will teach you more about the advanced ALLIANCE CAD tools 
(logic synthesis, finite-state-machine synthesis, data-path compiler) and 
the corresponding design flow.
Besides the interactive mode, a Makefile builds automatically the chip.
Running the Makefile will tell you if the ALLIANCE CAD tools are
correctly installed on your machine.
Note that 64 MBytes of memory (including 32 MBytes of RAM)
are required to generate the cif layout file (s2r tool).


Beginners with ALLIANCE should start with the ADDACCU or AMD2901, because
the DLX tutorial is much more complicated.

