s/ID_DX7/67/g
s/MidiDevice/MPU_DEV_0/g
s/MPU_CLOCK_PERIOD/240/g
s/MPU_DEFAULT_TIME_BASE/120/g
s/MPU_DEFAULT_TEMPO/(60.0)/g
s/MPU_TPS(tempo,/time_base)/g
s/MPU_DEFAULT_TICS_PER_SEC/MPU_TPS(MPU_DEFAULT_TEMPO,MPU_DEFAULT_TIME_BASE)/g
s/MPU_STOP_PLAY/0x05/g
s/MPU_START_PLAY/0x0a/g
s/MPU_CONTINUE_PLAY/0x0b/g
s/MPU_STOP_RECORD/0x11/g
s/MPU_STOP_OVERDUB/0x15/g
s/MPU_RECORD_STANDBY/0x20/g
s/MPU_START_RECORD/0x22/g
s/MPU_START_OVERDUB/0x2a/g
s/MPU_ALL_NOTE_OFF/0x30/g
s/MPU_NO_REAL_TIME/0x32/g
s/MPU_THRU_OFF/0x33/g
s/MPU_TIMING_ON/0x34/g
s/MPU_MODE_MESS_ON/0x35/g
s/MPU_THRU_ACTIVE_SENSING/0x36/g
s/MPU_THRU_EXCLU_ON/0x37/g
s/MPU_COMMON_TO_HOST_ON/0x38/g
s/MPU_REAL_TIME_TO_HOST_ON/0x39/g
s/MPU_DATA_END/0xfc/g
s/MPU_INT_CLOCK/0x80/g
s/MPU_FSK_CLOCK/0x81/g
s/MPU_MIDI_CLOCK/0x82/g
s/MPU_METRO_NO_ACC/0x83/g
s/MPU_METRO_OFF/0x84/g
s/MPU_METRO_ACC/0x85/g
s/MPU_BENDER_OFF/0x86/g
s/MPU_BENDER_ON/0x87/g
s/MPU_MIDI_THRU_OFF/0x88/g
s/MPU_MIDI_THRU_ON/0x89/g
s/MPU_DATA_STOP_RECORD_OFF/0x8a/g
s/MPU_DATA_STOP_RECORD_ON/0x8b/g
s/MPU_SEND_MEASURE_END_OFF/0x8c/g
s/MPU_SEND_MEASURE_END_ON/0x8d/g
s/MPU_CONDUCTOR_ON/0x8e/g
s/MPU_CONDUCTOR_OFF/0x8f/g
s/MPU_FSK_TO_INT/0x92/g
s/MPU_FSK_TO_MIDI/0x93/g
s/MPU_CLOCK_TO_HOST_OFF/0x94/g
s/MPU_CLOCK_TO_HOST_ON/0x95/g
s/MPU_EXCLUSIVE_TO_HOST_OFF/0x96/g
s/MPU_EXCLUSIVE_TO_HOST_ON/0x97/g
s/MPU_RESET_TEMPO/0xb1/g
s/MPU_CLEAR_PLAY_COUNTERS/0xb8/g
s/MPU_TIMEBASE_48/0xc2/g
s/MPU_TIMEBASE_72/0xc3/g
s/MPU_TIMEBASE_96/0xc4/g
s/MPU_TIMEBASE_120/0xc5/g
s/MPU_TIMEBASE_144/0xc6/g
s/MPU_TIMEBASE_168/0xc7/g
s/MPU_TIMEBASE_192/0xc8/g
s/MPU_SEND_SYSTEM_MESSAGE/0xdf/g
s/MPU_TEMPO/0xe0/g
s/MPU_RELATIVE_TEMPO/0xe1/g
s/MPU_GRADUATION/0xe2/g
s/MPU_MIDI_METRO/0xe4/g
s/MPU_METRO_MEAS/0xe6/g
s/MPU_SET_INT_CLOCK/0xe7/g
s/MPU_ACTIVE_TRACKS/0xec/g
s/MPU_CHANNELS_1to8/0xee/g
s/MPU_CHANNELS_9to16/0xef/g
s/MPU_RESET/0xff/g
s/MPU_STAT_DRR/bit(6)/g
s/MPU_STAT_DSR/bit(7)/g
s/MPU_COM_RESET/UCH(0xff)/g
s/MPU_MESS_CONDREQ/UCH(0xf9)/g
s/MPU_MESS_CASSREQ/UCH(0xfa)/g
s/MPU_MESS_ACK/UCH(0xfe)/g
s/MPU_TR_MAX/8/g
s/MPU_TR_COM/(MPU_TR_MAX+0)/g
s/MPU_TR_COND/(MPU_TR_MAX+1)/g
s/MPU_TRACK(n)/(1<<n)/g
s/MPU_IOC_TRACK/_IOW(m,/g
s/MPU_IOC_PURGE/_IO(m,/g
s/MPU_IOC_RESID/_IOR(m,/g
