AMG(1)

NAME
AMG - Array Multiplior Generator

ORIGIN
This software belongs to the ALLIANCE CAD system from the CAO-VLSI team at MASI laboratory, University P. & M. Curie 4, Place Jussieu ; 75252 Paris Cedex 05 ; FRANCE Fax: (33-1) 44.27.62.86 ; E-mail: cao-vlsi@masi.ibp.fr

SYNOPSIS
amg <size1> <size2> [ -t0 -t1 -n=<integer> ] [ -virtual -msb0 ] [ -layout -vhdl -datasheet -icon -patterns] [ -o <BlockName> ]

DESCRIPTION
    amg provides several different views of a booth multiplier with or without pipeline. The multiplier generated respects a bit-slice topologie and can be inserted in a data path.

The Interface is the following
unpipelined multiplier:
ENTITY amg IS

PORT	(
    a: IN    BIT_VECTOR (M-1 DOWNTO 0);
    b: IN    BIT_VECTOR (N-1 DOWNTO 0);
    p: OUT    BIT_VECTOR ((N+M-1) DOWNTO 0);
    Vdd: IN BIT;
    Vss: IN BIT
    );
    END amg;

pipelined multiplier:

ENTITY amg IS

PORT	(
    a:    IN    BIT_VECTOR (M-1 DOWNTO 0),
    b:    IN    BIT_VECTOR (N-1 DOWNTO 0),
    p:    OUT    BIT_VECTOR ((N+M-1) DOWNTO 0),
    ck:    IN     BIT,
    sd:    IN     BIT,
    st:    IN     BIT,
    scin:    IN    BIT,
    scout:    OUT    BIT
    Vdd: IN BIT;
    Vss: IN BIT );
    END amg;

OPTIONS

size1:
    is the first operand size. The range is from 6 to 64.It's an odd number.

size2:
    is the second operand size. The range is from 6 to 64. It's an odd number.

-layout:
    provides the layout view of the multiplier.

-vhdl:
    gives a behavioural vhdl description of the multiplier

-datasheet:
    provides technical informations about the multiplier like size value or propagation delays .

-icon:
    provides an icon representing the generated multiplier

-patterns:
    provides a set of test vectors in .pat format which is the format used by asimut

-t0,-t1,-n:
    These parameters specifie the pipelined configuration

The global topologie is the following
    ____________________________________________________
        |    |
        DNC    MUX+CSA    CLA
        |    |
    ____________________________________________________
    As it can be seen on the figure, the multiplier can be divided into three parts:
    -> The input part is the DNC part.
    -> The central part is a succession of "mux column" and "csa column".
    -> The output part is the final adder of the multiplication.
    t0: This parameter indicates if a "master-slave column" must be placed after the first part.
    * t0 -> after
    * default -> none
    t1: This parameter indicates if a "master-slave column" must be placed before the CLA.
    * t1 -> before
    * default -> none
    n: This parameter indicates the number of "master-slave columns" in the central part

-oBlockName:
    specifies the name of the generated multiplier. (default name is m<size1>x<size2> )

EXAMPLES

    amg 32 32 -t0 -t1 -n=3 -layout -datasheet -vhdl -o mult32
    Produces the layout, the datasheet, and the vhdl view of a 32 X 32 size multiplier with pipeline.

SEE ALSO
MBK_CATA_LIB(1), MBK_WORK_LIB(1), MBK_OUT_PH(1), MBK_OUT_LO(1), MBK_IN_PH(1),

DIAGNOSTICS
please report bugs, problems and suggestions to cao-vlsi masi.ibp.fr