DP_RFG1C0(3)

ORIGIN
This software belongs to the ALLIANCE CAD system from the
CAO-VLSI team at MASI laboratory, University P. & M. Curie
4, Place Jussieu ; 75252 PARIS Cedex 05 ; FRANCE
Fax: (33-1) 44.27.62.86 ; E-mail: cao-vlsi@masi.ibp.fr

NAME
DP_RFG1C0 - Register File

SYNOPSYS
#include  <fpgen.h>
void  DP_RFG1C0(
    char *InstName,  /*            Instance name             */
    long  RegNB   ,  /*         Number of Registers          */
    char *SigAr   ,  /*  IN          Read data adress   CTRL */
    char *SigWe   ,  /*  IN         Write enable        CTRL */
    char *SigAw   ,  /*  IN         Write data adress   CTRL */
    char *BusI    ,  /*  IN         Write data input    DATA */
    char *BusO    ,  /* OUT   Direct read data output   DATA */
    char *SigCk   ,  /*  IN              Clock input    DATA */
               EOL);

DESCRIPTION
    DP_RFG1C0 creates a one-read and one-write register file of RegNB registers and then instanciates it with the name InstName. The register bit-size is the full wide of the current data-path, set by the previous call to the function DP_DEFLOFIG. The first register R0 is hardwired to the constant zero.
    The environment variable MBK_CATA_LIB have to contain an additionnal library path when using this macro-function, see fpgen(1) for more details.

EXAMPLE
DP_RFG1C0("rfg0_instance0", 8, "read_adress[2:0]" ,
                                "pin_wen"         ,
                              "write_adress[2:0]" ,
                                "data_input[31:0]",
                               "data_output[31:0]",
                                "pin_ck"          , EOL);

SEE ALSO
rfg(1) , fpgen(1), dpr(1), genlib(1), mbk(1), DP_INV(3), DP_AND2(3), DP_NAND2(3), DP_AND3(3), DP_NAND3(3), DP_OR2(3), DP_NOR2(3), DP_OR3(3), DP_NOR3(3), DP_XOR2(3), DP_XNOR2(3), DP_NAND2MASK(3), DP_NOR2MASK(3), DP_XNOR2MASK(3), DP_NMUX2CS(3), DP_MUX2CS(3), DP_MUX3CD(3), DP_BUSE(3), DP_NBUSE(3), DP_ADSB2F(3), DP_SHIFT(3), DP_NUL(3), DP_CONST(3), DP_DFF(3), DP_DFFT(3), DP_RFG1C0(3), fplib(5)