annup_y(5)

NAME
annup_y

ORIGIN
This cell is available with the sclib Library which
belongs to the ALLIANCE CAD system from the
CAO-VLSI team at MASI laboratory, University P. et M. Curie
4, place Jussieu; 75252 Cedex 05; FRANCE
Fax : (33-1) 44.27.62.86; E-mail : cao-vlsi@masi.ibp.fr

SYNOPSIS
Genlib call :
  LOINS("annup_y","name","i1","i2","i3","i4","f","vdd","vss",0);

DESCRIPTION
- Interface
   entity annup_y is
     port(
        i1 : in bit;
        i2 : in bit;
        i3 : in bit;
        i4 : in bit;
        f : out bit;
        vdd : in bit;
        vss : in bit);
- Logical description
   f <= ((i2 or i1) nand (i3 or i4));

- Physical features
   number of grids : 5
   number of feed-through : 0

- Timing caracteristics
   i1 : 42 (fF)
        tplh = 3325 (ps) + 6086 (Ohms) x Cload (fF)
        tphl = 1528 (ps) + 2582 (Ohms) x Cload (fF)
   i2 : 42 (fF)
        tplh = 2876 (ps) + 6086 (Ohms) x Cload (fF)
        tphl = 1005 (ps) + 2582 (Ohms) x Cload (fF)
   i3 : 42 (fF)
        tplh = 2562 (ps) + 6086 (Ohms) x Cload (fF)
        tphl = 1499 (ps) + 2582 (Ohms) x Cload (fF)
   i4 : 42 (fF)
        tplh = 2113 (ps) + 6086 (Ohms) x Cload (fF)
        tphl = 960 (ps) + 2582 (Ohms) x Cload (fF)

DIAGNOSTICS
If problems arise please e-mail to : cao-vlsi@masi.ibp.fr